Understanding Power Consumption in Digital Electronics

EXECUTIVE SUMMARY

Effective thermal management in digital electronics comprises a vast number of design considerations that must be accounted for before fielding computational hardware for low maintenance installations into high stress environments and operating conditions. Some of the mitigation may be addressed through proper chip design and selection, generally outside the control of server vendors. Other mitigation must be addressed through incorporation of proper design and integration techniques at the system level.

INTRODUCTION

There are a vast number of variables that go into power consumption and dissipation measurements. Simply powering on a server and measuring the current without taking these variables into consideration will almost always result in misleading data that could lead to system design issues that drive confounding perplexity under different operating, environmental, and/or randomly due to die variations. The purpose of this paper is to sort out these factors and describe the various physical properties of semiconductor technology that contribute to power consumption in digital processors and supporting chipsets found in computational server hardware. Concepts defined in this paper include static power, quiescent power, gate leakage, linear and exponential dependencies on switching frequency and temperature, and common die to die lot silicon variations.

Table of Contents

  • Executive Summary
  • Introduction
  • Background
  • Static Power
  • Dynamic Power
  • Die to Die Variation
  • Utilization
  • Conclusions

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